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J Electromagn Eng Sci > Volume 9(2); 2009 > Article
Journal of the Korean Institute of Electromagnetic and Science 2009;9(2):78-84.
DOI: https://doi.org/10.5515/JKIEES.2009.9.2.078   
Effects of Drain Bias on Memory-Compensated Analog Predistortion Power Amplifier for WCDMA Repeater Applications
Yong-Sub Lee, Mun-Woo Lee, Sang-Ho Kam, Yoon-Ha Jeong
Department of Electronic and Electrical Engineering, Pohang University of Science and Technology
This paper represents the effects of drain bias on the linearity and efficiency of an analog pre-distortion power amplifier(PA) for wideband code division multiple access(WCDMA) repeater applications. For verification, an analog predistorter(APD) with three-branch nonlinear paths for memory-effect compensation is implemented and a class-AB PA is fabricated using a 30-W Si LOMaS. From the measured results, at an average output power of 33 dBm(lO-dB back-off power), the PA with APD shows the adjacent channel leakage ratio(ACLR, ${pm}$5 MHz offset) of below -45.1 dBc, with a drain efficiency of 24 % at the drain bias voltage($V_{DD}$) of 18 V. This compared an ACLR of -36.7 dEc and drain efficiency of 14.1 % at the $V_{DD}$ of 28 V for a PA without APD.
Key words: Analog Predistorter(APD), Bias, Efficiency, Memory Effect, Power Amplifier(PA)
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