| Design of Reflector Type Frequency Doubler for Undesired Harmonic Suppression Using Harmonic Load Pull Simulation Technique |
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Jae-Woong Jang1, Yong-Hoon Kim2 |
1Korea Aerospace Research Institute(KARI)
2Department of Mechatronics, Gwangju Institute of Science and Technology(GIST) |
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| Abstract |
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In this paper, a study on the reflector type frequency doubler, to suppress the undesired harmonics, is presented. A 12 to 24 GHz reflective frequency doubler is simulated and experimented. Design procedure of the frequency doubler with reflector is provided and the frequency doubler with good spectral purity is fabricated successfully. It has harmonic suppression of the $40{sim}50;dBc$ in the $1^{st}$ harmonic and the $50{sim}60;dB$ in the $3^{rd}$ harmonic with no additional filter. And, it has conversion gain with the input power of 0 dBm over bandwidth of 500 MHz. A NEC's ne71300(N) GaAs FET is used and the nonlinear model(EEFET3) using IC-CAP program is extracted for harmonic load pull simulation. Good agreement between simulated and measured results has been achieved. |
| Key words:
Frequency Multiplier, Reflector, Frequency Doubler, Harmonic Load Pull Simulation |
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